1. Field of the Invention
The invention relates to a pipelined recycling ADC and more particularly to a pipelined recycling ADC with a shared operational amplifier (OP) function.
2. Description of the Related Art
Analog-to-digital converters (ADCs) are employed in a variety of electronic systems including computer modems, wireless telephones, satellite receivers, process control systems, etc. Such systems demand cost-effective ADCs that can efficiently convert an analog input signal to a digital output signal over a wide range of frequencies and signal magnitudes with minimal noise and distortion.
Among the variety of known ADC structures, flash ADCs, folding ADCs, subranging ADCs, and pipelined ADCs are all able to process signals at a high-speed. Of these various structures, the pipelined ADC structure, which is low powered and occupies a small area, has been widely used to satisfy both conditional requirements of high-speed signal processing and high resolution.
Generally, the pipelined ADC structure comprises serial conversion stages. To reduce power consumption, the conversion stages share an operational amplifier (OP). Since the OP is shared among the conversion stages, memory effect occurs during the conversion stages of a pipelined ADC. The efficiency of the pipelined ADC may be influenced by memory effect.